[i2c] [PATCH] Enable PEC on ICH6+ SMBus

Gaston, Jason D jason.d.gaston at intel.com
Mon Dec 4 20:36:01 CET 2006


OK, sound good to me.

Thanks,

Jason


-----Original Message-----
From: Jean Delvare [mailto:khali at linux-fr.org] 
Sent: Monday, December 04, 2006 11:32 AM
To: Gaston, Jason D
Cc: Linux I2C
Subject: Re: [PATCH] Enable PEC on ICH6+ SMBus

Jason,

On Mon, 4 Dec 2006 10:37:22 -0800, Gaston, Jason D wrote:
> Have you tested with this patch?  My only concern is that the ICHx
> datasheets specify conditions when the PEC bit should and should not
be
> set.
> 
> Example from ICH8 Datasheet: "The I2C Read command with the PEC_EN bit
> set produces undefined results. Software must force both the PEC_EN
and
> AAC bit to 0 when running this command."

I don't have hardware to test the patch at the moment, but the problem
you evoke exists for the ICH4 and ICH5 as well, and the driver properly
handles it: PEC is only enabled for transactions for which it makes
sense. In particular, the SMBus Quick command and the I2C block
transaction are explicitely excluded:

> 	hwpec = isich4 && (flags & I2C_CLIENT_PEC)
> 		&& size != I2C_SMBUS_QUICK
> 		&& size != I2C_SMBUS_I2C_BLOCK_DATA;

PEC is also only used with slave chips which are known to support it.
So I don't expect any problem enabling PEC on the ICH6 and later chips.

Thanks,
-- 
Jean Delvare



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