[i2c] [PATCH] AT91 bus driver loses data

[Ronny Nilsson]

> Hi,
> I applied your patch to the Linux kernel version 2.6.19 running on an Atmel AT91SAM9261EK.  

Hi
I'm having trouble applying your patch. Do I need more than 2.6.19? My
guess is you are using an old driver version. Can you try again with the
latest? (Note that is targeted against 2.6.22).
	http://lists.lm-sensors.org/pipermail/i2c/2007-June/001425.html



> I found that there was a problem with reading the i2c.  In the manual, AT91SAM9261.pdf, in the errata section, 41.2.10.4, it states:
> 
> 		41.2.10.4 TWI: Possible Receive Holding Register Corruption
> 		When loading the TWI_RHR, the transfer direction is ignored. The last data byte received in
> 		the TWI_RHR is corrupted at the end of the first subsequent transmit data byte. Neither
> 		RXRDY nor OVERRUN status bits are set if this occurs.
> 		Problem Fix/Workaround
> 		The user must be sure that received data is read before transmitting any new data.
> 	I added code to clear the RHR after a i2c read has concluded.  This cleared up the i2c read problem.

AT91RM9200 behaves in the same way and there's really no need to clear
the RHR. The driver works as expected anyway. Can you describe the
problem you discovered in detail?


> Also, in the function, at91_twi_hwinit(), I added code to check the low and high clock divider values, cldiv & chdiv, and the clock divider, ckdiv, are within the acceptable range of 0 to 8191, and, will print an error message and return error of invalid value.

In parse_clk_arg() we verify those same variables for AT91RM9200. Please
add your AT91SAM9261 specific checks after the:
	if (cpu_is_at91rm9200()) {
		......
	}


> Also, for the AT91SAM9261 the TWI status register does not define the status bits of AT91_TWI_OVRE, overflow, and, AT91_TWI_UNRE, underflow.  I put in conditional compilation based on CONFIG_ARCH_AT91SAM9261, to compile out the above status bits.  This seems to work.
> 

Where? I can't find any conditionals for CONFIG_ARCH_AT91SAM9261 in your
patch. Removing the error checks might be a bad thing. Does AT91SAM9261
have other error flags? I haven't checked but it might be that the
AT91SAM9261 I2C controller behaves better than AT91RM9200 though and
actually pauses the CLK when needed.

Regards
/Ronny Nilsson