[i2c] nvidia patch in linuxbios

[Hans-Frieder Vogt]

Jean,

thanks very much for the clarification. With that info I can confirm that both Read Byte AND Send Byte definitely work as expected
at least for nForce2 and nForce4(CK804). The options b, c, and W give the same output there from an SPD EEPROM.
Can anybody confirm this for nForce5xx/nForce6xx? Unfortunately I do not have such a board (yet).

I have also tested whether the linuxbios code for Receive Byte (MCP55) works on CK804 and the result of reading from the
command register (called SMBHSTCMD in linuxbios) instead from the Data[0] register (called SMBHSTDAT0) is simply a
number of zeros. Could it really be, that the i2c controller in MCP55 has changed this mode relative to the CK804?
I cannot beleive this!

Cheers,
Hans-Frieder

Am Donnerstag, 1. März 2007 08:53 schrieb Jean Delvare:
> Hi Hans-Frieder,
> 
> On Wed, 28 Feb 2007 00:05:44 +0100, Hans-Frieder Vogt wrote:
> > From all what I can see, the nforce2/3/4/5... SMBus controllers
> > follow the ACPI register model, and therefore this is also
> > currently reflected in the i2c-nforce2 code. I have not tried to
> > use Send Byte so far (I may overwrite something :-), but on
> 
> For most chips, Send Byte isn't an actual write, it only sets an
> internal pointer for a subsequent Receive Byte.
> 
> An easy way to ensure that the i2c bus driver implementation is correct
> is to use the different modes of i2cdump on an EEPROM. Try modes "b",
> "c", "W" and, if supported, "i", and compare the outputs. You should
> have 3 (resp. 4) times the exact same output. Mode "b" tests Read Byte,
> mode "c" tests Send Byte and Receive Byte, mode "W" tests Read Word and
> mode "i" tests I2C Block Read.
> 

-- 
--
Hans-Frieder Vogt                 e-mail: hfvogt <at> arcor .dot. de
                                          hfvogt <at> gmx .dot. net