[i2c] [PATCH] Is review of AT91 patch pending?

arasv at magtech.com.au arasv at magtech.com.au
Fri Oct 19 12:36:38 CEST 2007


> Hi Aras,
>
> On Fri, 19 Oct 2007 10:13:30 +1000, Aras Vaichas wrote:
>> Results for your i2c-at91 driver:
>>
>> (*) At 10KHz, 256 pass, 0 fail
>> (*) At 50KHz, 256 pass, 0 fail
>> (*) At 75KHz, 255 pass, 1 fail
>> (*) At 100KHz, 252 pass, 4 fail
>> (*) At 150KHz, 1024 pass, 4 fail
>> (*) At 200KHz,  1024 pass, 6 fail
>>
>> Same tests again, but with CPU heavily loaded using the "stress"
>> application:
>>
>> (*) At 10KHz, 256 pass, 0 fail
>> (*) At 50KHz, 256 pass, 0 fail
>> (*) At 75KHz, 255 pass, 0 fail
>> (*) At 100KHz, 8800 pass, 34 fail (overnight test)
>> (*) At 150KHz, 380 pass, 70 fail
>> (*) At 200KHz, 54 pass, 20 fail
>
> Is your EEPROM specified for frequencies above 100 kHz at all?
>
> (Not to suggest that the AT91 I2C bus controller isn't broken, we all
> know it is, but to be fair you shouldn't test speeds not officially
> supported by your I2C chips.)

I'm using the Atmel 24C64 running at 3V3. It's specified for 100KHz at 2.7V,
400KHz at 5V. I calculate that it goes up to 200KHz at 3V3. That's why I
stopped the tests at that clock rate.

Regardless, the driver fails in my system a 100KHz.

Aras


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