[i2c] [PATCH] gpio: max732x: add support for MAX7319, MAX7320-7327 I2C Port Expanders

[David Brownell]

> 3. for chips like max732x, actually, the range of 0x50 - 0x5F will be
> monitored by the I2C chips at startup to decide the connections of
> AD2/AD0 pins to GND/VCC/SCL/SDA,

There's no need to monitor addresses ... before the first data bit
is sent -- whatever value! -- it's known how those pins are wired:

 - START bit ... SCL is high, SDA falls.  Any pin that stayed
   low is wired to ground.  Any pin that changed high-to-low is
   thus connected to SDA.

 - Prepare to send first bit ... SDA still low, SCL falls.  Any
   pin that stayed high is wired to Vcc.  Any pin that changed
   high-to-low is connected to SCL.

And then the master updates SDA to match the first (address) bit,
and lets SCL be pulled high ... the i2c slave has all the data it
needs to be able to determine its address.


>		so actually, even if the chip
> is finally decided at, say 0x56, no sane hardware designers will put
> another chip whose address falls between 0x50-0x5F together with
> such a max732x chip, ugly, but true.

As Jean said:  I don't buy this point at all.  This isn't the only
chip to use that GND/VCC/SCL/SDA scheme, and all data sheets I've
seen talk about how it lets lots of distinct chips be used.  They
can't all be wrong...

I think someone was leading you astray!

- Dave