sensors reporting
Karl Heyes
karl at pts.tele2.co.uk
Sun May 12 16:12:34 CEST 2002
Just some data points for you. I have a VIA 686 chip which
is reporting the temperature ok. A few alterations were needed
for the sensors.conf
This is the default output, version 2.6.3.
# sensors
eeprom-i2c-0-50
Adapter: SMBus Via Pro adapter at 5000
Algorithm: Non-I2C SMBus adapter
via686a-isa-6000
Adapter: ISA adapter
Algorithm: ISA algorithm
CPU core: +1.78 V (min = +1.98 V, max = +2.49 V) ALARM
+2.5V: +1.53 V (min = +2.24 V, max = +2.74 V) ALARM
I/O: +3.40 V (min = +2.95 V, max = +3.62 V) +5V: +4.82 V
(min = +4.47 V, max = +5.49 V) +12V: +12.10 V (min = +10.79 V, max =
+13.18 V) CPU Fan: 4821 RPM (min = 3000 RPM, div = 2) P/S
Fan: 0 RPM (min = 3000 RPM, div = 2) SYS Temp: +49.4°C (limit
= +40°C, hysteresis = +45°C) ALARM
CPU Temp: +27.9°C (limit = +55°C, hysteresis = +60°C) SBr Temp: +21.0°C
(limit = +60°C, hysteresis = +65°C)
my case the following needed to be done
CPU/SYS Temp need to be swapped.
CPU core known as Vcore in BIOS
+2.5V known as Vagp in BIOS
I/O knowsn as 3.3V
limits changed for CPU temp, Vcore, Vagp.
The lspci -vv is below if it's of any use, minus the 2xethernet, IDE and AGP
card.
00:00.0 Host bridge: Advanced Micro Devices [AMD] AMD-760 [Irongate] System
Controller (rev 13)
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B-
Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort+ >SERR- <PERR-
Latency: 32
Region 0: Memory at d0000000 (32-bit, prefetchable) [size=128M]
Region 1: Memory at df001000 (32-bit, prefetchable) [size=4K]
Region 2: I/O ports at a000 [disabled] [size=4]
Capabilities: [a0] AGP version 2.0
Status: RQ=15 SBA+ 64bit- FW+ Rate=x1,x2
Command: RQ=0 SBA+ AGP+ 64bit- FW- Rate=x1
00:01.0 PCI bridge: Advanced Micro Devices [AMD] AMD-760 [Irongate] AGP
Bridge (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR+ FastB2B-
Status: Cap- 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR-
Latency: 32
Bus: primary=00, secondary=01, subordinate=01, sec-latency=32
I/O behind bridge: 00009000-00009fff
Memory behind bridge: dc000000-ddffffff
Prefetchable memory behind bridge: d8000000-dbffffff
BridgeCtl: Parity- SERR+ NoISA+ VGA+ MAbort- >Reset- FastB2B-
00:07.0 ISA bridge: VIA Technologies, Inc. VT82C686 [Apollo Super South] (rev
40)
Subsystem: VIA Technologies, Inc. VT82C686/A PCI to ISA Bridge
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping+ SERR- FastB2B-
Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR-
Latency: 0
Capabilities: [c0] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA
PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
00:07.4 SMBus: VIA Technologies, Inc. VT82C686 [Apollo Super ACPI] (rev 40)
Subsystem: VIA Technologies, Inc. VT82C686 [Apollo Super ACPI]
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B-
Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR-
Interrupt: pin ? routed to IRQ 9
Capabilities: [68] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA
PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=0 PME-
cheers
karl.
More information about the lm-sensors
mailing list